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This study aims to investigate the possible defects and their root causes in a soft-termination multilayered ceramic capacitor (MLCC) when subjected to a thermal reflow process.

Specimens of the capacitor assembly were subjected to JEDEC level 1 preconditioning (85 °C/85%RH/168 h) with 5× reflow at 270°C peak temperature. Then, they were inspected using a 2 µm scanning electron microscope to investigate the evidence of defects. The reliability test was also numerically simulated and analyzed using the extended finite element method implemented in ABAQUS.

Excellent agreements were observed between the SEM inspections and the simulation results. The findings showed evidence of discontinuities along the Cu and the Cu-epoxy layers and interfacial delamination crack at the Cu/Cu-epoxy interface. The possible root causes are thermal mismatch between the Cu and Cu-epoxy layers, moisture contamination and weak Cu/Cu-epoxy interface. The maximum crack length observed in the experimentally reflowed capacitor was measured as 75 µm, a 2.59% difference compared to the numerical prediction of 77.2 µm.

This work's contribution is expected to reduce the additional manufacturing cost and lead time in investigating reliability issues in MLCCs.

Despite the significant number of works on the reliability assessment of surface mount capacitors, work on crack growth in soft-termination MLCC is limited. Also, the combined experimental and numerical investigation of reflow-induced reliability issues in soft-termination MLCC is limited. These cited gaps are the novelties of this study.

This study aims to investigate the reliability issues of microvoid cracks in solder joint packages exposed to thermal cycling fatigue.

The specimens are subjected to JEDEC preconditioning level 1 (85 °C/85%RH/168 h) with five times reflow at 270°C. This is followed by thermal cycling from 0°C to 100°C, per IPC-7351B standards. The specimens' cross-sections are inspected for crack growth and propagation under backscattered scanning electronic microscopy. The decoupled thermomechanical simulation technique is applied to investigate the thermal fatigue behavior. The impacts of crack length on the stress and fatigue behavior of the package are investigated.

Cracks are initiated from the ball grid array corner of the solder joint, propagating through the transverse section of the solder ball. The crack growth increases continuously up to 0.25-mm crack length, then slows down afterward. The J-integral and stress intensity factor (SIF) values at the crack tip decrease with increased crack length. Before 0.15-mm crack length, J-integral and SIF reduce slightly with crack length and are comparatively higher, resulting in a rapid increase in crack mouth opening displacement (CMOD). Beyond 0.25-mm crack length, the values significantly decline, that there is not much possibility of crack growth, resulting in a negligible change in CMOD value. This explains the crack growth arrest obtained after 0.25-mm crack length.

This work's contribution is expected to reduce the additional manufacturing cost and lead time incurred in investigating reliability issues in solder joints.

The work investigates crack propagation mechanisms of microvoid cracks in solder joints exposed to moisture and thermal fatigue, which is still limited in the literature. The parametric variation of the crack length on stress and fatigue characteristics of solder joints, which has never been conducted, is also studied.

This study aims to investigate the thermal fracture mechanism of moisture-preconditioned SAC305 ball grid array (BGA) solder joints subjected to multiple reflow and thermal cycling.

The BGA package samples are subjected to JEDEC Level 1 accelerated moisture treatment (85 °C/85%RH/168 h) with five times reflow at 270 °C. This is followed by multiple thermal cycling from 0 °C to 100 °C for 40 min per cycle, per IPC-7351B standards. For fracture investigation, the cross-sections of the samples are examined and analysed using the dye-and-pry technique and backscattered scanning electron microscopy. The packages' microstructures are characterized using an energy-dispersive X-ray spectroscopy approach. Also, the package assembly is investigated using the Darveaux numerical simulation method.

The study found that critical strain density is exhibited at the component pad/solder interface of the solder joint located at the most distant point from the axes of symmetry of the package assembly. The fracture mechanism is a crack fracture formed at the solder's exterior edges and grows across the joint's transverse section. It was established that Au content in the formed intermetallic compound greatly impacts fracture growth in the solder joint interface, with a composition above 5 Wt.% Au regarded as an unsafe level for reliability. The elongation of the crack is aided by the brittle nature of the Au-Sn interface through which the crack propagates. It is inferred that refining the solder matrix elemental compound can strengthen and improve the reliability of solder joints.

Inspection lead time and additional manufacturing expenses spent on investigating reliability issues in BGA solder joints can be reduced using the study's findings on understanding the solder joint fracture mechanism.

Limited studies exist on the thermal fracture mechanism of moisture-preconditioned BGA solder joints exposed to both multiple reflow and thermal cycling. This study applied both numerical and experimental techniques to examine the reliability issue.

This paper aims to study the relationship between the ball grid array (BGA) flip-chip underfilling process parameter and its void formation region.

A set of top-down scanning acoustic microscope images of BGA underfill is collected and void labelled. The labelled images are trained with a convolutional neural network model, and the performance is evaluated. The model is tested with new images, and the void area with its region is analysed with its dispensing parameter.

All findings were well-validated with reference to the past experimental results regarding dispensing parameters and their quantitative regional formation. As the BGA is non-uniform, 85% of the test samples have void(s) formed in the emptier region. Furthermore, the highest rating factor, valve dispensing pressure with a Gini index of 0.219 and U-type dispensing pattern set of parameters generally form a lower void percentage within the underfilling, although its consistency is difficult to maintain.

This study enabled manufacturers to forecast the void regional formation from its filling parameters and array pattern. The filling pressure, dispensing pattern and BGA relations could provide qualitative insights to understand the void formation region in a flip-chip, enabling the prompt to formulate countermeasures to optimise voiding in a specific area in the underfill.

The void regional formation in a flip-chip underfilling process can be explained quantitatively with indicative parameters such as valve pressure, dispensing pattern and BGA arrangement.

This paper aims to introduce a new indicative parameter of filling efficiency to quantify the performance and productivity of the flip-chip underfill encapsulation process. Additionally, the variation effect of the bump pitch of flip-chip on the filling efficiency was demonstrated to provide insight for flip-chip design optimization.

The filling efficiency was formulated analytically based on the conceptual spatial and temporal perspectives. Subsequently, the effect of bump pitch on filling efficiency was studied based on the past actual-scaled and current scaled-up underfill experiments. The latter scaled-up experiment was validated with both the finite volume method-based numerical simulation and analytical filling time model. Moreover, the scaling validity of scaled-up experiment was justified based on the similarity analysis of dimensionless number.

Through the scaling analysis, the current scaled-up experimental system is justified to be valid since the adopted scaling factor 40 is less than the theoretical scaling limit of 270. Furthermore, the current experiment was qualitatively well validated with the numerical simulation and analytical filling time model. It is found that the filling efficiency increases with the bump pitch, such that doubling the bump pitch would triple the efficiency.

The new performance indicative index of filling efficiency enables the package designers to justify the variation effect of underfill parameter on the overall underfill process. Moreover, the upper limit of scaling factor for scaled-up package was derived to serve as the guideline for future scaled-up underfill experiments.

The performance of underfill process as highlighted in this paper was never being quantified before in the past literatures. Similarly, the scaling limit that is associated to the scaled-up underfill experiment was never being reported elsewhere too.

This paper aims to present experimental and finite volume method (FVM)-based simulation studies on the scaling effect on the capillary contact angle and entrant pressure for a three-dimensional encapsulation process of ball-grid array (BGA).

With the development of various sizes of BGA packages, the scaling effect of BGA model on capillary underfill (CUF) process is investigated together with the influences of different industrial standard solder bump arrangements and dispensing methods used as case study.

The experimental results agree well to the simulation findings with minimal deviation in filling time and similar flow front profiles for all setups. The results revealed that the capillary contact angle of flow front decreases in scale-up model with larger gap height observed and lengthens the encapsulation process. Statistical correlation studies are conducted and accurate regression equations are obtained to relate the gap height to the completion filling time and contact angle. CUF threshold capillary pressures were computed based on Leverett-J function and found to be increasing with the scale size of the package.

These statistical data provide accurate insights into the impact of BGA’s scale sizes to the CUF process that will be benefiting the future design of BGA package. This study provided electronic designers with profound understanding on the scaling effect in CUF process of BGA, which may be extended to the future development of miniature-sized BGA and multi-stack device.

This study relates the flow behaviour of encapsulant to its capillary contact angle and Leverett-J pressure threshold, in the CUF process of different BGA and dispensing conditions. To date, no research has been found to predict the threshold pressure on the gap between the chip and substrate.

This paper aims to present new analytical model for the filling times prediction in flip-chip underfill encapsulation process that is based on the surface energetic for post-bump flow.

The current model was formulated based on the modified regional segregation approach that consists of bump and post-bump regions. Both the expansion flow and the subsequent bumpless flow as integrated in the post-bump region were modelled considering the surface energy–work balance.

Upon validated with the past underfill experiment, the current model has the lowest root mean square deviation of 4.94 s and maximum individual deviation of 26.07%, upon compared to the six other past analytical models. Additionally, the current analytically predicted flow isolines at post-bump region are in line with the experimental observation. Furthermore, the current analytical filling times in post-bump region are in better consensus with the experimental times as compared to the previous model. Therefore, this model is regarded as an improvised version of the past filling time models.

The proposed analytical model enables the filling time determination for flip-chip underfill process at higher accuracy, while providing more precise and realistic post-bump flow visualization. This model could benefit the future underfill process enhancement and package design optimization works, to resolve the productivity issue of prolonged filling process.

The analytical underfill studies are scarce, with only seven independent analytical filling time models being developed to date. In particular, the expansion flow of detachment jump was being considered in only two previous works. Nonetheless, to the best of the authors’ knowledge, there is no analytical model that considered the surface energies during the underfill flow or based on its energy–work balance. Instead, the previous modelling on post-bump flow was based on either kinematic or geometrical that is coupled with major assumptions.

The purpose of the study is to investigate the spatial aspects of underfill flow during the flip-chip encapsulation process, for instance, meniscus evolution and contact line jump (CLJ). Furthermore, a spatial-based void formation mechanism during the underfill flow was formulated.

The meniscus evolution of underfill fluid subtended between the bump array and the CLJ phenomenon were visualized numerically using the micro-mesh unit cell approach. Additionally, the meniscus evolution and CLJ phenomenon were modelled analytically based on the formulation of capillary physics. Meanwhile, the mechanism of void formation was explained numerically and analytically.

Both the proposed analytical and current numerical findings achieved great consensus and were well-validated experimentally. The variation effects of bump pitch on the spatial aspects were analyzed and found that the meniscus arc radius and filling distance increase with the pitch, while the subtended angle of meniscus arc is invariant with the pitch size. For larger pitch, the jump occurs further away from the bump entrance and takes longer time to attain the equilibrium meniscus. This inferred that the concavity of meniscus arc was influenced by the bump pitch. On the voiding mechanism, air void was formed from the air entrapment because of the fluid-bump interaction. Smaller voids tend to merge into a bigger void through necking and, subsequently, propagate along the underfill flow.

The microscopic spatial analysis of underfill flow would explain fundamentally how the bump design will affect the macroscopic filling time. This not only provides alternative visualization tool to analyze flow pattern in the industry but also enables the development of accurate analytical filling time model. Moreover, the void formation mechanism gave substantial insights to understand the root causes of void defects and allow possible solutions to be formulated to tackle this issue. Additionally, the microfluidics sector could also benefit from these spatial analysis insights.

Spatial analysis on underfill flow is scarcely conducted, as the past research studies mainly emphasized on the temporal aspects. Additionally, this work presented a new mechanism on the void formation based on the fluid-bump interaction, in which the formation and propagation of micro-voids were numerically visualized for the first time. The findings from current work provided fundamental information on the flow interaction between underfill fluid and solder bump to the package designers for optimization work and process enhancement.

This study aims to investigate the NiO nano-reinforced solder joint characteristics of ultra-fine electronic package.

Lead-free Sn-Ag-Cu (SAC) solder paste was mixed with various percentages of NiO nanoparticles to prepare the new form of nano-reinforced solder paste. The solder paste was applied to assemble the ultra-fine capacitor using the reflow soldering process. A focussed ion beam, high resolution transmission electron microscopy system equipped with energy dispersive X-ray spectroscopy (EDS) was used in this study. In addition, X-ray inspection system, field emission scanning electron microscopy coupled with EDS, X-ray photoelectron spectroscopy (XPS) and nanoindenter were used to analyse the solder void, microstructure, hardness and fillet height of the solder joint.

The experimental results revealed that the highest fillet height was obtained with the content of 0.01 Wt.% of nano-reinforced NiO, which fulfilled the reliability requirements of the international IPC standard. However, the presence of the NiO in the lead-free solder paste only slightly influenced the changes of the intermetallic layer with the increment of weighted percentage. Moreover, the simulation method was applied to observe the distribution of NiO nanoparticles in the solder joint.

The findings are expected to provide a profound understanding of nano-reinforced solder joint’s characteristics of the ultra-fine package.

This paper aims to investigate the characteristics of ultra-fine lead-free solder joints reinforced with TiO₂ nanoparticles in an electronic assembly.

This study focused on the microstructure and quality of solder joints. Various percentages of TiO₂ nanoparticles were mixed with a lead-free Sn-3.5Ag-0.7Cu solder paste. This new form of nano-reinforced lead-free solder paste was used to assemble a miniature package consisting of an ultra-fine capacitor on a printed circuit board by means of a reflow soldering process. The microstructure and the fillet height were investigated using a focused ion beam, a high-resolution transmission electron microscope system equipped with an energy dispersive X-ray spectrometer (EDS), and a field emission scanning electron microscope coupled with an EDS and X-ray diffraction machine.

The experimental results revealed that the intermetallic compound with the lowest thickness was produced by the nano-reinforced solder with a TiO₂ content of 0.05 Wt.%. Increasing the TiO₂ content to 0.15 Wt.% led to an improvement in the fillet height. The characteristics of the solder joint fulfilled the reliability requirements of the IPC standards.

This study provides engineers with a profound understanding of the characteristics of ultra-fine nano-reinforced solder joint packages in the microelectronics industry.

The findings are expected to provide proper guidelines and references with regard to the manufacture of miniaturized electronic packages. This study also explored the effects of TiO₂ on the microstructure and the fillet height of ultra-fine capacitors.